Package & SI/PI - Senior/Staff Packaging Engineer - Electro-Thermal

Education:

PhD in Electrical/Mechanical Engineering, or related field with focus on thermal management, power delivery, or electronic packaging (Master's with 5+ years experience considered)

Strong academic background in power integrity, signal integrity, and thermal management for advanced packaging

Technical Skills:

Expert proficiency in: ANSYS RedHawk-SC, RHSC Electrothermal, Totem, PathFinder, SIwave, HFSS, Q3D; Cadence Voltus, Sigrity, Clarity; Synopsys RedHawk Fusion, PrimeTime, ICC2

Experience with physical design tools (Cadence Innovus, Synopsys ICC2, Siemens Calibre) and RTLto-GDSII flows

Strong programming/scripting: Python, C/C++, Tcl, Shell (bash); Verilog/VHDL/SystemVerilog for verification

Knowledge of advanced packaging: 2.5D/3D ICs (CoWoS, InFO, EMIB), chiplets, TSVs, interposers, FOWLP, RDL design

Domain Expertise:

Deep understanding of EM/IR analysis, power integrity, thermal physics, and electrothermal cosimulation

Expertise in heat transfer principles (conduction, convection, radiation), thermal material properties, and CTE mismatch

Knowledge of chiplet standards (UCIe and BoW), die-to-die interfaces, and wafer-scale integration

Hands-on experience with semiconductor package thermal/electrical analysis and tape-outs