Senior Design Verification Engineer

As a Design Verification Engineer at Eximietas Design, you will play a vital role in our VLSI team by working on next-generation SoC designs. With locations in Bengaluru, Pune, Hyderabad, Chennai, Ahmedabad, as well as in the USA (San Jose/Austin), we are seeking passionate individuals with a minimum of 4-25 years of ASIC/SoC Design Verification experience. Key Qualifications: - 425 years of ASIC/SoC Design Verification experience - Strong understanding of ASIC design concepts and verification flow - Experience in IP, Subsystem, and SoC level verification - Strong SystemVerilog/UVM coding expertise - Good understanding of RAL methodology Protocol Experience: - AMBA protocols: AXI, APB, AHB - Low-speed peripherals: I2C, SPI, QSPI, DMA, UART, GPIO, Interrupt Controllers - High-speed protocols: PCIe, CXL, Ethernet, USB - Memory protocols: DDR, LPDDR, HBM Tools & Methodologies: - Simulation tools: VCS, Xcelium - Waveform analyzers & Third-party VIP integration - Version control: Git, SVN, Perforce - Experience with GLS and Power Aware Simulation (UPF) Key Responsibilities: - Develop UVM testbench components (Driver, Monitor, Scoreboard) - Define verification strategy, test plans & coverage plans - Implement SystemVerilog assertions & functional coverage - Perform coverage analysis and debug missing scenarios - Collaborate with design, architecture, and pre/post-silicon teams - Work closely with customer leads and ensure verification sign-off Join us to work on cutting-edge SoC and semiconductor technologies in a collaborative and innovation-driven engineering culture. We offer competitive compensation & benefits with a strong focus on career growth and technical leadership. Interested candidates can share their updated resume via the provided email address. Referrals are highly appreciated. Best Regards, Maruthy Prasaad Associate VLSI Manager Talent Acquisition Visakhapatnam As a Design Verification Engineer at Eximietas Design, you will play a vital role in our VLSI team by working on next-generation SoC designs. With locations in Bengaluru, Pune, Hyderabad, Chennai, Ahmedabad, as well as in the USA (San Jose/Austin), we are seeking passionate individuals with a minimum of 4-25 years of ASIC/SoC Design Verification experience. Key Qualifications: - 425 years of ASIC/SoC Design Verification experience - Strong understanding of ASIC design concepts and verification flow - Experience in IP, Subsystem, and SoC level verification - Strong SystemVerilog/UVM coding expertise - Good understanding of RAL methodology Protocol Experience: - AMBA protocols: AXI, APB, AHB - Low-speed peripherals: I2C, SPI, QSPI, DMA, UART, GPIO, Interrupt Controllers - High-speed protocols: PCIe, CXL, Ethernet, USB - Memory protocols: DDR, LPDDR, HBM Tools & Methodologies: - Simulation tools: VCS, Xcelium - Waveform analyzers & Third-party VIP integration - Version control: Git, SVN, Perforce - Experience with GLS and Power Aware Simulation (UPF) Key Responsibilities: - Develop UVM testbench components (Driver, Monitor, Scoreboard) - Define verification strategy, test plans & coverage plans - Implement SystemVerilog assertions & functional coverage - Perform coverage analysis and debug missing scenarios - Collaborate with design, architecture, and pre/post-silicon teams - Work closely with customer leads and ensure verification sign-off Join us to work on cutting-edge SoC and semiconductor technologies in a collaborative and innovation-driven engineering culture. We offer competitive compensation & benefits with a strong focus on career growth and technical leadership. Interested candidates can share their updated resume via the provided email address. Referrals are highly appreciated. Best Regards, Maruthy Prasaad Associate VLSI Manager Talent Acquisition Visakhapatnam