Senior Design Verification Lead

Role Overview: As a Senior SOC Design Verification Engineer at Eximietas Design, you will be a key member of the team responsible for ensuring the robustness and correctness of cutting-edge System on Chip (SoC) designs, with a strong focus on PCIE (Peripheral Component Interconnect Express) subsystems. You will work on complex verification challenges, collaborate with cross-functional teams, and contribute to delivering high-quality semiconductor solutions. Key Responsibilities: - Develop and implement verification plans for complex SoC designs, particularly focusing on PCIE subsystems. - Create and maintain advanced testbenches using SystemVerilog and UVM (Universal Verification Methodology). - Write and execute test cases to verify functional and performance requirements, specifically for PCIE protocols. - Debug and resolve functional and performance issues in collaboration with design and architecture teams. - Develop and enhance verification environments, including reusable components and checkers for PCIE and related interfaces. - Perform coverage-driven verification and ensure coverage closure. - Collaborate with cross-functional teams to define verification strategies and methodologies. - Mentor junior engineers and contribute to the continuous improvement of verification processes. Qualifications: - 4+ years of hands-on experience in SoC design verification, with a strong emphasis on PCIE protocols. - Expertise in SystemVerilog and UVM (Universal Verification Methodology). - In-depth knowledge of PCIE specifications (e.g., PCIE Gen3/Gen4/Gen5) and verification methodologies. - Proficiency in developing and debugging complex testbenches and test cases for PCIE subsystems. - Experience with coverage-driven verification and achieving coverage closure. - Familiarity with AMBA protocols (AXI, AHB, APB) and other industry-standard interfaces. - Knowledge of low-power verification techniques and power-aware simulation. - Experience with formal verification tools and methodologies is a plus. - Strong problem-solving skills and attention to detail. - Excellent communication and teamwork skills. Additional Details: Eximietas Design offers: - Opportunity to work on cutting-edge SoC designs and innovative technologies. - Collaborative and inclusive work environment. - Competitive compensation and benefits package. - Professional growth and development opportunities. If this opportunity interests youor if you know someone suitableplease send your updated resume to: maruthiprasad.e@eximietas.design. Referrals are highly appreciated. Best regards, Maruthy Prasaad Associate VLSI Manager - Talent Acquisition Eximietas Design Email: maruthiprasad.e@eximietas.design Phone: +91 8088969910. Role Overview: As a Senior SOC Design Verification Engineer at Eximietas Design, you will be a key member of the team responsible for ensuring the robustness and correctness of cutting-edge System on Chip (SoC) designs, with a strong focus on PCIE (Peripheral Component Interconnect Express) subsystems. You will work on complex verification challenges, collaborate with cross-functional teams, and contribute to delivering high-quality semiconductor solutions. Key Responsibilities: - Develop and implement verification plans for complex SoC designs, particularly focusing on PCIE subsystems. - Create and maintain advanced testbenches using SystemVerilog and UVM (Universal Verification Methodology). - Write and execute test cases to verify functional and performance requirements, specifically for PCIE protocols. - Debug and resolve functional and performance issues in collaboration with design and architecture teams. - Develop and enhance verification environments, including reusable components and checkers for PCIE and related interfaces. - Perform coverage-driven verification and ensure coverage closure. - Collaborate with cross-functional teams to define verification strategies and methodologies. - Mentor junior engineers and contribute to the continuous improvement of verification processes. Qualifications: - 4+ years of hands-on experience in SoC design verification, with a strong emphasis on PCIE protocols. - Expertise in SystemVerilog and UVM (Universal Verification Methodology). - In-depth knowledge of PCIE specifications (e.g., PCIE Gen3/Gen4/Gen5) and verification methodologies. - Proficiency in developing and debugging complex testbenches and test cases for PCIE subsystems. - Experience with coverage-driven verification and achieving coverage closure. - Familiarity with AMBA protocols (AXI, AHB, APB) and other industry-standard interfaces. - Knowledge of low-power verification techniques and power-aware simulation. - Experience with formal verification tools and methodologies is a plus. - Strong problem-solving skills and attention to detail. - Excellent communication and teamwork skills. Additional Details: Eximietas Design offers: - Opportunity to work on cutting-edge SoC designs and innovative technologies. - Co