Senior Design Verification Professional

As a Senior SOC Design Verification Engineer at Eximietas Design, you will play a crucial role in ensuring the robustness and correctness of cutting-edge System on Chip (SoC) designs, with a focus on PCIE (Peripheral Component Interconnect Express) subsystems. You will collaborate with cross-functional teams, tackle complex verification challenges, and contribute to the delivery of high-quality semiconductor solutions. Key Responsibilities: - Develop and implement verification plans for complex SoC designs, specifically focusing on PCIE subsystems. - Create and maintain advanced testbenches using SystemVerilog and UVM (Universal Verification Methodology). - Write and execute test cases to verify functional and performance requirements, particularly for PCIE protocols. - Debug and resolve functional and performance issues in coordination with design and architecture teams. - Enhance verification environments by developing reusable components and checkers for PCIE and related interfaces. - Drive coverage-driven verification and ensure coverage closure. - Collaborate with cross-functional teams to define verification strategies and methodologies. - Mentor junior engineers and contribute to the improvement of verification processes. Qualifications: - 4 years of hands-on experience in SoC design verification, with a strong emphasis on PCIE protocols. - Proficiency in SystemVerilog and UVM (Universal Verification Methodology). - Deep understanding of PCIE specifications (e.g., PCIE Gen3/Gen4/Gen5) and verification methodologies. - Ability to develop and debug complex testbenches and test cases for PCIE subsystems. - Experience with coverage-driven verification and achieving coverage closure. - Familiarity with AMBA protocols (AXI, AHB, APB) and other industry-standard interfaces. - Knowledge of low-power verification techniques and power-aware simulation. - Experience with formal verification tools and methodologies is a plus. - Strong problem-solving skills, attention to detail, excellent communication, and teamwork abilities. If this opportunity as a Senior SOC Design Verification Engineer excites you, please send your updated resume to the provided email address. Referrals are highly appreciated. Best regards, Maruthy Prasaad Associate VLSI Manager - Talent Acquisition Eximietas Design As a Senior SOC Design Verification Engineer at Eximietas Design, you will play a crucial role in ensuring the robustness and correctness of cutting-edge System on Chip (SoC) designs, with a focus on PCIE (Peripheral Component Interconnect Express) subsystems. You will collaborate with cross-functional teams, tackle complex verification challenges, and contribute to the delivery of high-quality semiconductor solutions. Key Responsibilities: - Develop and implement verification plans for complex SoC designs, specifically focusing on PCIE subsystems. - Create and maintain advanced testbenches using SystemVerilog and UVM (Universal Verification Methodology). - Write and execute test cases to verify functional and performance requirements, particularly for PCIE protocols. - Debug and resolve functional and performance issues in coordination with design and architecture teams. - Enhance verification environments by developing reusable components and checkers for PCIE and related interfaces. - Drive coverage-driven verification and ensure coverage closure. - Collaborate with cross-functional teams to define verification strategies and methodologies. - Mentor junior engineers and contribute to the improvement of verification processes. Qualifications: - 4 years of hands-on experience in SoC design verification, with a strong emphasis on PCIE protocols. - Proficiency in SystemVerilog and UVM (Universal Verification Methodology). - Deep understanding of PCIE specifications (e.g., PCIE Gen3/Gen4/Gen5) and verification methodologies. - Ability to develop and debug complex testbenches and test cases for PCIE subsystems. - Experience with coverage-driven verification and achieving coverage closure. - Familiarity with AMBA protocols (AXI, AHB, APB) and other industry-standard interfaces. - Knowledge of low-power verification techniques and power-aware simulation. - Experience with formal verification tools and methodologies is a plus. - Strong problem-solving skills, attention to detail, excellent communication, and teamwork abilities. If this opportunity as a Senior SOC Design Verification Engineer excites you, please send your updated resume to the provided email address. Referrals are highly appreciated. Best regards, Maruthy Prasaad Associate VLSI Manager - Talent Acquisition Eximietas Design