System Verilog Verification Engineer

As a Design Verification Engineer at Eximietas Design, you will play a crucial role in the verification of ASIC/SoC designs, utilizing your expertise in verification technologies. With 4 to 20+ years of experience, you will contribute to the development of next-generation SoCs and AI-driven semiconductor innovations. What Were Looking For: - Strong ASIC / SoC Design Verification experience - Expertise in SystemVerilog & UVM - Experience in IP, Subsystem & SoC-level verification - Positive understanding of RAL methodology - Strong debugging and problem-solving skills Protocol Expertise: - AMBA Protocols: AXI, APB, AHB - Low-Speed Interfaces: I2C, SPI, QSPI, DMA, UART, GPIO - High-Speed Protocols: PCIe, CXL, Ethernet, USB - Memory Protocols: DDR, LPDDR, HBM Tools & Methodologies: - VCS, Xcelium - GLS & Power-Aware Simulation (UPF) - Third-Party VIP Integration - Git / SVN / Perforce - Assertions, Functional Coverage & Coverage Closure Key Responsibilities: - Develop advanced UVM testbench components - Define verification strategies, test plans & coverage models - Implement SystemVerilog assertions & functional coverage - Perform coverage analysis and debug complex scenarios - Collaborate with Architecture, RTL, and Pre/Post-Silicon teams - Drive verification sign-off and quality closure At Eximietas Design, you will have the opportunity to work on cutting-edge semiconductor & AI technologies, be part of an innovation-driven engineering culture, access strong technical learning & leadership opportunities, enjoy competitive compensation & benefits, and gain global exposure with high-impact projects. Interested candidates can share resumes at the provided contact information. Referrals are highly appreciated within your network. Join us at Eximietas Design and be a part of shaping the future of semiconductor innovations! As a Design Verification Engineer at Eximietas Design, you will play a crucial role in the verification of ASIC/SoC designs, utilizing your expertise in verification technologies. With 4 to 20+ years of experience, you will contribute to the development of next-generation SoCs and AI-driven semiconductor innovations. What Were Looking For: - Strong ASIC / SoC Design Verification experience - Expertise in SystemVerilog & UVM - Experience in IP, Subsystem & SoC-level verification - Positive understanding of RAL methodology - Strong debugging and problem-solving skills Protocol Expertise: - AMBA Protocols: AXI, APB, AHB - Low-Speed Interfaces: I2C, SPI, QSPI, DMA, UART, GPIO - High-Speed Protocols: PCIe, CXL, Ethernet, USB - Memory Protocols: DDR, LPDDR, HBM Tools & Methodologies: - VCS, Xcelium - GLS & Power-Aware Simulation (UPF) - Third-Party VIP Integration - Git / SVN / Perforce - Assertions, Functional Coverage & Coverage Closure Key Responsibilities: - Develop advanced UVM testbench components - Define verification strategies, test plans & coverage models - Implement SystemVerilog assertions & functional coverage - Perform coverage analysis and debug complex scenarios - Collaborate with Architecture, RTL, and Pre/Post-Silicon teams - Drive verification sign-off and quality closure At Eximietas Design, you will have the opportunity to work on cutting-edge semiconductor & AI technologies, be part of an innovation-driven engineering culture, access strong technical learning & leadership opportunities, enjoy competitive compensation & benefits, and gain global exposure with high-impact projects. Interested candidates can share resumes at the provided contact information. Referrals are highly appreciated within your network. Join us at Eximietas Design and be a part of shaping the future of semiconductor innovations!