RTL Design Engineer

Job Title: RTL Design Engineer - 4-6 Yrs No. Of positions: 1 Experience required: 4-6 years Candidate should be with strong RTL design experience. Strong design knowledge on Ethernet IPs or Ethernet protocol domain. Good knowledge in Verilog/VHDL languages. Knowledge in any of the scripting languages TCL/Perl/python is a plus. Good Knowledge of A XI Protocols. Good communication skills and experience working with different teams. Experience on FPGA methodology/technology is a plus. Qualification: B.E/M.E/B. Tech/M. Tech Disclaimer : This job posting has been aggregated from external source. Role detailscontentand availability are subject to change. Applicants are advised to confirm the latest information directly on the company website before applying.