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About the role
Working experience in IP/SoC/Subsystem/verification Strong understanding of computer architecture and ASIC design flow Experience in UVM Experience in Verilog and System Verilog languages Experience with PCIe/DDR/USB/Ethernet/CXL/HDMI/MIPI/DSI/CS/GLS/CPU Verification Experience with hands on IP integrations into SOC is a plus Excellent debug skills. Experience in assembly language or C is a plus Familiar with scriptig (Python/Perl/Shell) Experience with assertion-based design strategies, code coverage, functional coverage and test plan development. Should have excellent communication skills (both written and oral) Strong problem-solving skills Job Location: Bangalore/Hyderabad/Delhi-NCR/Remote Education: B.E/B,Tech/M.E/M.Tech
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