Padmi

Physical Design Engineer

HyderabadPosted 75 months ago
Electrical Electronics And Computer Hardware EngineeringMid-levelFull Time, Permanent
Apply at Smart Vlsi

Opens the source posting on naukri.com

Source description

About the role

View original

Job Description B.Tech or M.Tech in Electronics/Electrical Engineering with minimum of 1 year of strong, hands on Physical Design experience. Must have handled Netlist to GDS II at block level for multiple tape outs. With Block level hands on experiences in most of the following:. Experience Required: 2-4 yrs Skills Required Block level floor planning, power planning and IR drop analysis. Timing closure with Xtalk and OCV Multimode multi corner optimization and closure. Clock tree synthesis and advanced clock tree implementation. Blocks sizes upward of 400K Instances to 2M Instances. Block level timing closure with sign off STA. Block level ECO implementation involving netlist level logical changes. Scripting experience in Perl/TCL. Excellent debugging skills in implementation issues and ability to come up with creative solutions. Low power technologies exposure. Technologies from 28nm and below. Physical Verification experience in advance nodes.

One address, no account. We’ll tell you when matching roles go live.

More at Smart Vlsi

Related open roles

View all roles