SystemC Modelling Engineer

Role Overview: As a skilled SystemC Modelling Engineer, you will be responsible for developing and maintaining SystemC/TLM models for SoC components, peripherals, and subsystems. You will work on designing and implementing virtual platforms and transaction-level simulations for processors, memory subsystems, bus architectures, interconnects, and SoC peripherals. Your role will involve collaborating with various teams to build accurate and scalable system-level models for next-generation SoCs and automotive platforms. Key Responsibilities: - Develop and maintain SystemC/TLM models for SoC components, peripherals, and subsystems. - Design and implement virtual platforms and transaction-level simulations for processors, memory subsystems, bus architectures, interconnects, and SoC peripherals. - Work on AMBA/AXI/AHB/APB/OCP/NoC protocols and related architectures. - Collaborate with architecture and RTL teams for system-level modelling and validation. - Optimize simulation performance and improve modelling accuracy. - Develop reusable modelling frameworks and verification utilities. - Perform debugging, profiling, and performance analysis of SystemC environments. - Support software bring-up and pre-silicon validation activities. - Contribute to documentation, code reviews, and best engineering practices. Qualifications Required: - 4 to 9 years of experience in SystemC/TLM based virtual platform development, C/C++ programming, and SoC architecture modelling. - Hands-on experience in creating high-performance transaction-level models for embedded systems and semiconductor platforms. (Note: The additional details of the company were not provided in the job description.) Role Overview: As a skilled SystemC Modelling Engineer, you will be responsible for developing and maintaining SystemC/TLM models for SoC components, peripherals, and subsystems. You will work on designing and implementing virtual platforms and transaction-level simulations for processors, memory subsystems, bus architectures, interconnects, and SoC peripherals. Your role will involve collaborating with various teams to build accurate and scalable system-level models for next-generation SoCs and automotive platforms. Key Responsibilities: - Develop and maintain SystemC/TLM models for SoC components, peripherals, and subsystems. - Design and implement virtual platforms and transaction-level simulations for processors, memory subsystems, bus architectures, interconnects, and SoC peripherals. - Work on AMBA/AXI/AHB/APB/OCP/NoC protocols and related architectures. - Collaborate with architecture and RTL teams for system-level modelling and validation. - Optimize simulation performance and improve modelling accuracy. - Develop reusable modelling frameworks and verification utilities. - Perform debugging, profiling, and performance analysis of SystemC environments. - Support software bring-up and pre-silicon validation activities. - Contribute to documentation, code reviews, and best engineering practices. Qualifications Required: - 4 to 9 years of experience in SystemC/TLM based virtual platform development, C/C++ programming, and SoC architecture modelling. - Hands-on experience in creating high-performance transaction-level models for embedded systems and semiconductor platforms. (Note: The additional details of the company were not provided in the job description.)