Design Verification Engineer Core and Subsystem (DDRSS, Cache Controller)

As a Design Verification (DV) Engineer at our company, you will be responsible for verifying core components and complex subsystems, specifically focusing on DDRSS and Cache Controller verification. Your key responsibilities will include: - Working on standard DV profiles with an emphasis on DDRSS. - Contributing to the verification of core components and complex subsystems. - Developing and executing test plans, test benches, and verification environments. - Utilizing advanced debugging techniques to identify and resolve design and verification issues. - Collaborating with design and architecture teams to ensure comprehensive coverage and validation. To excel in this role, you should possess the following skills and experience: - Strong experience in Cache Controller and complex subsystem verification. - Proficiency in core and subsystem areas. - Excellent debugging skills and problem-solving ability. - Preference for experience in working with standard verification methodologies such as UVM/OVM/SystemVerilog. - Must have exposure to memory interfaces, particularly DDRSS. If you are a highly skilled DV Engineer with 5+ years of experience and a deep technical understanding, we encourage you to apply for this position in Noida. As a Design Verification (DV) Engineer at our company, you will be responsible for verifying core components and complex subsystems, specifically focusing on DDRSS and Cache Controller verification. Your key responsibilities will include: - Working on standard DV profiles with an emphasis on DDRSS. - Contributing to the verification of core components and complex subsystems. - Developing and executing test plans, test benches, and verification environments. - Utilizing advanced debugging techniques to identify and resolve design and verification issues. - Collaborating with design and architecture teams to ensure comprehensive coverage and validation. To excel in this role, you should possess the following skills and experience: - Strong experience in Cache Controller and complex subsystem verification. - Proficiency in core and subsystem areas. - Excellent debugging skills and problem-solving ability. - Preference for experience in working with standard verification methodologies such as UVM/OVM/SystemVerilog. - Must have exposure to memory interfaces, particularly DDRSS. If you are a highly skilled DV Engineer with 5+ years of experience and a deep technical understanding, we encourage you to apply for this position in Noida.