Application Engineering, Sr Engineer ICV Runset Development

Develop and validate DRC, LVS, and Fill runsets for advanced nodes. Collaborate closely with leading foundries to understand process requirements and deliver high-quality PV runsets. Automate qualification processes for IC Validator runsets using scripting languages like Perl, Tcl, and Python. Troubleshoot and resolve complex layout verification issues, including LVS discrepancies, DRC violations, and DFM challenges. Interface directly with customers and FAEs to gather requirements and provide technical support. Mentor junior team members, share best practices, and contribute to a knowledge-sharing culture within the team. Job Requirements Advanced proficiency with EDA tools such as IC Validator, Calibre, Pegasus, and PVS. Strong scripting skills in Perl, Tcl, and Python for automation and rule deck development. Deep understanding of CMOS layout, ASIC design flows, and foundry process requirements. Experience in writing and debugging DRC, LVS, ERC, and DFM rule decks. Exposure to competitive EDA tools and awareness of their strengths and limitations. Tech, M degree.