Source description
About the role
Job Description
Post-Silicon Physical Layer Electrical Validation/Characterization Engineers will be self-motivated and will perform post-Silicon device validation and debugging of high speed serdes. These candidates will need to have SW development background and should have worked in automation environments.
Key Responsibilities
Silicon Bring-Up & Validation: laboratory testing of test chips to validate high-speed physical layer electrical performance. Compliance Testing: Conduct compliance testing for interfaces such as PCIe, USB standards Hardware Automation: Basic automation scripts for test characterization. Debug & Characterization: Analyze, debug, and root cause silicon issues using oscilloscopes, network analyzers, and BERT. Documentation: Generate characterization reports, and documentation for internal reviews.
Required Qualifications & Skills
Education: B.E/B.Tech in Electronics or Similar Experience: 2-3 years Concepts: Good understanding of Jitter, Equalization, De-embedding. Lab Equipment: Hands-on experience with high-bandwidth Oscilloscopes, BERT, and VNA & other basic lab instruments Scripting/Tools: Knowledge in Python, Linux for test automation.
vlsi design,automation scripting,networking,python,linux,
More at UST