Padmi

Technical Lead I - VLSI

BangalorePosted 4 months ago
Electrical Electronics And Computer Hardware EngineeringUnspecified
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JD:- SoC Architecture.

Validation planning, Post Silicon Validation (C/C++, VC++), working with SystemC based Virtual prototypes (debugging tests at model code level). Understands Virtual prototypes (SystemC) capabilities for test development and bring up. System level debugging (JTAG, Gdb). SW Bring up. SW Configuration Management (Rational CC, Git). HW set ups, HW test equipment (Lauterbach/JTAG, Logic analyzer, Oscilloscope).

vlsi design,validation planning,post silicon validation,c,virtual prototypes,sw configuration management,jtag,gdb

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