Source description
About the role
Key Requirements: 4 6 years of SOC Design Verification (DV) experience with a strong focus on GPIO, sensos , CPU core verification, Debug Architecture, and eFuse verification. Must possess solid knowledge of verification methodologies, testbench development, and coverage analysis for SOC projects. Experience with SystemVerilog/UVM, scripting, and hardware debugging tools is essential. Strong problem solving skills and the ability to work collaboratively in a cross functional team are required. Skill Requirements : GPIO, Sensor ,Debug Architecture, and eFuse , SOC DV Good to have : CPU core verification , Frequency Monitors Experience: 4 6 years experience Qualifications: B.Tech/B.E/M.Tech/M.E
vlsi design,gpio,soc design verification,systemverilog,scripting,
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