Technical Lead I - VLSI

We are looking for profiles with 6-8 years' experience in SoC RTL/DFx verification and debug, GLS simulations and debug, Verilog coding experience, good understanding on JTAG and verification in Testmode. It s good to have pattern generation and Silicon debug experience. Please let me know if you have suitable profiles.

vlsi design,verilog hdl,service operation center,system verilog,