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About the role
Experience- 9+yrs
Xilinx FPGA - Versal and Ultrascale families Handling large SOC design and familiarly with VCS, Xcelium tools Proficient in Verilog/ System Verilog and Test benches. Experience in HAPS emulation - HAPS100 or HAPS200 ,protocompiler flow. Hands on experience in bring up of PCIe, SPI, I2C, DDR interfaces and strong experience in debug.
vlsi design,soc design,systemverilog,asic design,
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