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- Verification Manager - UVM, System Verilog, Emulation - [ID 017] Job Description Duties and Responsibilities: Managing a team in India for verification and emulation activities. Technically leading and mentoring the team. Working with architecture and design teams to define verification goals. Creating work plan and schedule according to the company s targets. Driving the team to achieve schedule goals. Monitoring the work of CWs in India. Minimum Qualifications: Bachelor s or master s degree in electrical engineering. At least 10 years of pre silicon verification experience. At least 3 years of managerial experience. Deep understanding of verification methodologies and concepts. Good communication skills and the ability to work cross-geographically. Preferred Qualifications: Emulation experience. Deep System Verilog UVM knowhow. Skills: ASIC, UVM, System Verilog Job Location: Hyderabad Experience: 10+ Years Disclaimer: This job posting has been aggregated from external source. Role details, content, and availability are subject to change. Applicants are advised to confirm the latest information directly on the company website before applying.
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