Padmi

ASIC RTL Design Lead - Verilog/SystemVerilog, CDC, Lint - [ID 014]

Delhi NCRPosted 1 month ago
Electrical Electronics And Computer Hardware EngineeringSenior
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Bachelors or Master s degree in Electrical Engineering,Computer Engineering,or a related field Experience. 7 - 15 Yrs. Company. Well Established Semiconductor Services. Disclaimer: This job posting has been aggregated from external source Experience in micro-architecture,integration,and debugging.

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ASIC RTL Design Lead - Verilog/SystemVerilog, CDC, Lint - [ID 014] at Vitestork Consulting · Padmi