Padmi

DFT Engineer

BangalorePosted 30 days ago
Electrical Electronics And Computer Hardware EngineeringSenior
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Overview The DFT Engineer plays a critical role in ensuring the testability, quality, and manufacturability of integrated circuits (ICs). They are responsible for implementing design for test (DFT) techniques to enable effective testing and diagnosis of ICs, contributing to the overall success of the product development process. Role: DFT Engineer Experience: 7+ Years & 10+ years Location: Bangalore Required Skills: · Hands-on experience in Scan Insertion, ATPG, GLS debug, MBIST pattern generation, and validation. A basic understanding of DFT IPs like OCC, EDT, SSN, MBIST controllers, IJTAG, IEEE 1600 standard, and Boundary scan. · Should be able to handle tasks independently. Should have good debugging skills. · Working knowledge of TCL is an add-on. · Experience with tessent DFT a preference. Required qualifications Bachelor's or higher degree in Electrical Engineering, Computer Engineering, or a related field. Proven experience in DFT, ATPG, and scan insertion for complex digital designs. Strong understanding of DFT architectures and methodologies for scan, ATPG, and MBIST. Familiarity with JTAG, boundary scan, and IEEE 1500 standards. Proficiency in RTL simulation tools and gate-level simulations for DFT analysis. Hands-on experience with DFT tools such as TetraMAX, DFT Compiler, and Mentor Tessent. Knowledge of DFT-related EDA tools and scripting languages (e.g., TCL, Python). Experience in silicon bring-up, test debug, and failure analysis. Strong problem-solving skills and ability to work in a dynamic, fast-paced environment. Effective communication and collaboration skills for cross-functional teamwork. Ability to multitask, prioritize, and drive results in a deadline-driven environment. Detail-oriented approach with a focus on quality and continuous improvement. Ability to adapt to new DFT techniques and methodologies as per project requirements. Understanding of DFT for low-power designs and test compression techniques. Previous experience in mentoring or leading DFT-related projects is a plus.

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