Senior DFT Engineer Lead

Position: Senior DFT Engineer / Lead

Locations: Hyderabad / Bangalore Experience: 4 to 12 Years Job Type: Full-time Open Positions:

Hyderabad: 3 Positions

Bangalore/Hyderabad: 5 Positions

Key Responsibilities:

Hands-on involvement in full-chip DFT design , implementation, and vector generation.

Experience with JTAG , Boundary Scan , and related simulation & verification processes.

Develop and execute DFT insertion , scan compression , ATPG generation , and validation.

Required Skills:

Strong experience in Scan, Compression, ATPG , and DFT simulations .

Proficiency with industry tools from Mentor Graphics, Synopsys, or Cadence .

Deep understanding of DFT architecture , patterns, and fault models.

Experience in debugging and validating scan insertion and ATPG coverage.

Preferred Qualifications

• Good understanding of SoC architecture and hierarchical DFT implementation.

• Prior experience working with cross-functional teams including RTL and Physical Design.