Fpga Design Engineer

Job Title: FPGA Design Engineer Location: Hyderabad Experience: 5+ Years Notice Period: Immediate to 30 Days Preferred. Job Description: We are seeking an experienced FPGA Design Engineer with strong expertise in RTL design, FPGA development, and high-speed interfaces. Key Responsibilities: Design and develop FPGA RTL using Verilog/SystemVerilog. Work on High-Speed I/O protocols such as PCIe, Ethernet, CXL, DDR, etc. Perform FPGA simulation, debugging, and hardware bring-up activities. Develop and maintain scripts using Python, Perl, TCL, or Bash. Work in a UVM-based verification environment and debug functional issues. Design and integrate interfaces such as SPI, I2C, AXI, QSPI, and USB. Collaborate with cross-functional teams on FPGA architecture, integration, and validation. Required Skills: 5+ years of RTL Design experience for FPGA. Strong knowledge of Verilog and/or SystemVerilog. Experience with one or more High-Speed I/O protocols: PCIe, Ethernet, CXL, DDR. Experience in FPGA debugging, simulation, and hardware bring-up. Scripting experience in Python, Perl, TCL, or Bash. Knowledge of UVM methodology and debugging. Experience with SPI, I2C, AXI, QSPI, USB, or similar protocols. Preferred Skills: SoC integration and IP development. Exposure to FPGA prototyping and timing closure. Experience with Xilinx or Intel FPGA platforms.