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- Physical Design Lead / Manager - [ID 008] Job Description Looking for Physical Design Engineers with strong RTL2GDSii Skill. Responsibilities include Logic Synthesis, Floor-planning, Place and Route, Timing Analysis, Convergence, IR/EM analysis, Formal verification, VC-LP, DRC/LVS clean-up and delivery of the Blocks or Subsystem to SOC level that is essentially complete RTL2GDSii vertical execution skill. Desirable to have experience in full chip implementation or flow development experience. Qualifications: The right candidate must have around 7+ years experience after B.S. or 6+ years after Masters degree. He/She must have owned and closed large design blocks. She/he should be experienced in Synopsys Tool suite or Cadence Tool Suite such as DC, ICC2/Fusion/Innovus, Primetime or alternative, Calibre/ICV, Conformal/Formality, ..etc. In addition, expertise in Ansys Redhawk-SC is highly desirable. The person should Skills: Physical Design, RTL to GDSII, Floor Plan Job Location: Bangalore / Noida / Hyderabad Experience: 8 - 15 Years
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