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About the role
- Principal Engineer - Digital Verification - [ID 018] Job Description Proven expertise with UVM and/or System Verilog based verification. Excellent understanding of ASIC verification methodologies and proven experience of verification. Experience working with source control tools, bug management tools and release management tools such as Jenkins, Git, and Jira. Strong written and verbal communication skills and ability to work independently. Bachelor s in electrical engineering or equivalent and 12+ years of experience. Skills: Digital Verification, SV, UVM Job Location: Hyderabad Experience: 12 - 18 Yrs
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