IP Design Director

IP Design Director Top30 Semiconductor Organization in the world Bangalore Role Overvie w We are seeking a Digital Design professional with deep expertise in high-performance controller and bridge design, micro-architecture, RTL implementation, and IP integration. The ideal candidate will play a critical role in the development of cutting-edge connectivity solution s . Key Responsibili ties Design and implement high-performance digital solutions, including RTL development and synthesis.Collaborate with cross-functional teams on IP integration for processor IPs and peripheralsDeep knowledge of processor boot process and peripheral implementation with boot firmware in mindOwn block-level and full-chip designs from architecture to GDS, focusing on designs at nodes 16nm.Ensure timing closure, assess verification completeness, and oversee pre- and post-silicon debug.Utilize tools from Synopsys/Cadence to ensure first-pass silicon success and apply expertise in UVM-based verification flows Basic Qualifications / Experience Level Bachelors in Electronics/Electrical engineering (Master's preferred).Minimum 20+ years of digital design experience, with focus on processor, peripherals and full chip implementation.Proven expertise in RTL development, synthesis, and timing closure.Experience with front-end design, gate-level simulations, and design verification.Strong work ethic, ability to handle multiple tasks, and a proactive, customer-focused at t itude. Required Expertise Proven expertise in micro-architecture development and RTL development for block level and full-chip designs at advanc ed nodes (Experience with front-end design, gate-level simulations, and supporting design verification through multiple ASIC T/ O cycles .Hands-on experience with processor IP (ARM/ARC)Experience of working on PCIe is a must.Hands-on pre-silicon and post-silicon implementing peripherals for I2 C/SPI/UARTHands-on experience with complex DMA engines and FW in teraction.Strong proficiency in System Verilog/Verilog and scripting (Pyt hon/Perl).Experience with block-level and full-chip design at advanced nodes ( 16nm).Silicon bring-up and post-silicon debug e xperience.Familiarity with industry standard simulation, debug, quality checking and synthesis tools Synopsys/Cadence tools and UVM-based design ver ification.Strong work ethic, ability to handle multiple tasks, and a proactive, customer-focused attitude. Preferr ed Experience Knowledge and experience implementing secure boot and security mechanisms like authentication and attestation is a plus.Knowledge of system-level design with ARM/ARC/RISC-V processors sub systemsExperience of working on PCIe/UAL is a big plus.Understanding of PAD design, DFT, and floor planning.Experience in synthesis, and timing closure is a big plus.Experience with NIC, switch, or storage product development.Familiarity with working in design and verification workflows in a CI/C D env ironment. Skilsm icroarchitecture"rtl design" / "RTL coding" /" RTL Devel opment"Synthesis "ti min g cl osure"A RMARCPCIeVerilogSys tem Verilo g (SV )UVMRIS C-V UAL ( UALink)NICSwitch "Di gital desig n"DMA"ip design" "ip development" "ip integrat ion" Contact:UdayM ulya Technologiesmuday_ bhaskar@yahoo.com .